HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 234

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 10.28 Output level Select Function
10.3.13 Timer Subcounter (TCNTS)
TCNTS is a 16-bit read-only counter that is used only in complementary PWM mode. The initial
value is H'0000.
Note: Accessing the TCNTS in 8-bit units is prohibited. Always access in 16-bit units.
10.3.14 Timer Dead Time Data Register (TDDR)
TDDR is a 16-bit register, used only in complementary PWM mode, that specifies the TCNT_3
and TCNT_4 counter offset values. In complementary PWM mode, when the TCNT_3 and
TCNT_4 counters are cleared and then restarted, the TDDR register value is loaded into the
TCNT_3 counter and the count operation starts. The initial value is H'FFFF.
Note: Accessing the TDDR in 8-bit units is prohibited. Always access in 16-bit units.
Rev. 2.00, 09/04, page 192 of 720
Bit
2
1
0
Bit 2
WF
0
1
Bit Name
WF
VF
UF
Bit 1
VF
0
1
0
1
Bit 0
UF
0
1
0
1
0
1
0
1
Initial
value
0
0
0
R/W
R/W
R/W
R/W
TIOC3B
U Phase
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
Description
Output Phase Switch 2 to 0
These bits set the positive phase/negative phase output
phase on or off state. The setting of these bits is valid only
when the FB bit in this register is set to 1. In this case, the
setting of bits 2 to 0 is a substitute for external input. See
table 10.28.
TIOC4A
V Phase
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
TIOC4B
W Phase U Phase
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
Function
TIOC3D
OFF
OFF
ON
OFF
OFF
OFF
ON
OFF
TIOC4C
V Phase
OFF
OFF
OFF
OFF
ON
ON
OFF
OFF
TIOC4D
W Phase
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF