HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 619

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI is available with 128 kbytes of on-chip ROM. The on-chip ROM is connected to the
CPU and data transfer controller (DTC) through a 32-bit data bus (figures 20.1). The CPU and
DTC can access the on-chip ROM in 8, 16 and 32-bit widths. Data in the on-chip ROM can
always be accessed in one cycle.
The operating mode determines whether the on-chip ROM is valid or not. The operating mode is
selected using mode-setting pins FWP and MD3 to MD0 as shown in table 3.1. If you are using
the on-chip ROM, select mode 2 or mode 3; if you are not, select mode 0 or mode 1. The on-chip
ROM is allocated to addresses H'00000000 to H'0001FFFF.
20.1
• Setting module standby mode
For mask ROM, this module can be disabled/enabled by the module standby control register.
Mask ROM operation is enabled for the initial value. Accessing mask ROM is disabled by
setting module standby mode. For more information, see section 24, Power-Down Modes.
Notes on Use
H'0001FFFC
H'00000000
H'00000004
Figure 20.1 Mask ROM Block Diagram
Section 20 Mask ROM
H'0001FFFD
H'00000001
H'00000005
Internal data bus (32 bits)
On-chip ROM
H'0001FFFE
H'00000002
H'00000006
Rev. 2.00, 09/04, page 577 of 720
H'0001FFFF
H'00000003
H'00000007