HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 649
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HD64F7047F50V
Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Specifications of HD64F7047F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
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Manufacturer:
PANJIT
Quantity:
30 000
Company:
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HD64F7047F50V
Manufacturer:
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386
Company:
Part Number:
HD64F7047F50V
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Quantity:
10 000
Part Number:
HD64F7047F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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24.2.1
SBYCR is an 8-bit readable/writable register that performs software standby mode control.
Bit
7
6
5
4 to 1
0
Bit Name
SSBY
HIZ
IRQEL
Standby Control Register (SBYCR)
Initial
Value
0
0
0
All 1
1
R/W
R/W
R/W
R
R
R/W
Port High-Impedance
Description
Software Standby
This bit specifies the transition mode after executing the
SLEEP instruction.
0: Shifts to sleep mode after the SLEEP instruction has
1: Shifts to software standby mode after the SLEEP
This bit cannot be set to 1 when the watchdog timer
(WDT) is operating (when the TME bit in TCSR of the
WDT is set to 1). When transferring to software standby
mode, clear the TME bit to 0, stop the WDT, then set the
SSBY bit to 1.
In software standby mode, this bit selects whether the pin
state of the I/O port is retained or changed to high-
impedance.
0: In software standby mode, the pin state is retained.
1: In software standby mode, the pin state is changed to
The HIZ bit cannot be set to 1 when the TEM bit in TCSR
of the WDT is set to 1.
When changing the pin state of the I/O port to high-
impedance, clear the TEM bit to 0, then set the HIZ bit to
1.
Reserved
This bit is always read as 0, and should always be written
with 0.
Reserved
These bits are always read as 1, and should always be
written with 1.
IRQ3 to IRQ0 Enable
IRQ interrupts are enabled to clear software standby
mode.
0: Software standby mode is cleared.
1: Software standby mode is not cleared.
been executed
instruction has been executed
high-impedance.
Rev. 2.00, 09/04, page 607 of 720
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