HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 572

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes: 1. The initial value is 1 in the on-chip ROM enabled/disabled 8-bit external-expansion
17.1.5
The port D I/O register L (PDIORL) is a 16-bit readable/writable register that is used to set the
pins on port D as inputs or outputs. Bits PD8IOR to PD0IOR correspond to pins PD8 to PD0
(names of multiplexed pins are here given as port names and pin numbers alone). PDIORL is
enabled when the port D pins are functioning as general-purpose inputs/outputs (PD8 to PD0) and
SCK2 pins are functioning as inputs/outputs of SCI. In other states, PDIORL is disabled.
A given pin on port D will be an output pin if the corresponding bit in PDIORL is set to 1, and an
input pin if the bit is cleared to 0.
Bits 15 to 9 of PDIORL are reserved. These bits are always read as 0 and should only be written
with 0.
Rev. 2.00, 09/04, page 530 of 720
Register
PBCR1
PBCR2
PBCR2
PBCR1
PBCR2
PBCR2
PBCR1
PBCR2
PBCR2
PBCR2
PBCR2
2. The initial value is 1 in the on-chip ROM disabled 8-bit external-expansion mode.
Port D I/O Register L (PDIORL)
Bit
11
7
6
10
5
4
9
3
2
1
0
mode.
Bit Name
PB3MD2
PB3MD1
PB3MD0
PB2MD2
PB2MD1
PB2MD0
PB1MD2
PB1MD1
PB1MD0
PB0MD1
PB0MD0
Initial
Value
0
0
0
0
0
0
0
0
0*
0
0*
2
2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
PB3 Mode
Select the function of the PB3/IRQ1/POE1/TXD4 pin.
000: PB3 I/O (port)
001: IRQ1 input (INTC) 101: Setting prohibited
010: POE1 input (port)
011: Setting prohibited
PB2 Mode
Select the function of the PB2/IRQ0/POE0/RXD4 pin.
000: PB2 I/O (port)
001: IRQ0 input (INTC) 101: Setting prohibited
010: POE0 input (port)
011: Setting prohibited
PB1 Mode
Select the function of the PB1/A17/HRXD1/SCK4 pin.
000: PB1 I/O (port)
001: A17 output (BSC)
010: Setting prohibited
011: HRxD1 input (HCAN2) 111: SCK4 I/O (SCI)
PB0 Mode
Select the function of the PB0/A16/HTxD1 pin.
00: PB0 I/O (port)
01: A16 output (BSC)
11: HTxD1 output (HCAN2)
100: Setting prohibited
110: Setting prohibited
111: TXD4 output (SCI)
100: Setting prohibited
110: Setting prohibited
111: RXD4 input (SCI)
10: Setting prohibited
100: Setting prohibited
101: Setting prohibited
110: Setting prohibited