HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 159

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Notes: 1. For the NMIF and AE bits, only a 0 write after a 1 read is possible.
8.2.9
The DTBR is a 16-bit readable/writable register that specifies the upper 16 bits of the memory
address containing DTC transfer information. Always access the DTBR in word or longword
units. If it is accessed in byte units the register contents will become undefined at the time of a
write, and undefined values will be read out upon reads. The initial value is undefined.
Bit
7
6
5
4
3
2
1
0
2. For the SWDTE bit, a 1 write is always possible, but a 0 write is possible only after a 1
DTC Information Base Register (DTBR)
Bit Name
DTVEC7
DTVEC6
DTVEC5
DTVEC4
DTVEC3
DTVEC2
DTVEC1
DTVEC0
is read.
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
DTC Software Activation Vectors 7 to 0
These bits specify the lower eight bits of the vector
addresses for DTC activation by software.
A vector address is calculated as H'0400 + DTVEC
(7:0). Always specify 0 for DTVEC0. For example,
when DTVEC7 to DTVEC0 = H'10, the vector address
is H'0410. When the bit SWDTE is 0, these bits can
be written to.
Rev. 2.00, 09/04, page 117 of 720

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