HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 603

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Table 19.4 Boot Mode Operation
Item
Boot mode
start
Bit rate
adjustment
Transfer of
programming
control
program
Flash
memory
erase
Table 19.5 Peripheral Clock (Pφ) Frequencies for which Automatic Adjustment of LSI Bit
Host Bit Rate
9,600 bps
19,200 bps
Host Operation
Processing Contents
Transmits data H'55 when
data H'00 is received
error-free.
Transmits number of bytes (N)
of programming control
program to be transferred as
2-byte data (lower byte
following upper byte)
Continuously transmits data
H'00 at specified bit rate.
Receives data H'AA.
Transmits 1-byte of
programming control program
(repeated for N times)
Receives data H'AA.
Rate is Possible
Boot program
erase error
Peripheral Clock Frequency Range of LSI
4 to 40 MHz
8 to 40 MHz
Communications Contents
H'00, H'00 ...... H'00
Upper byte and
lower byte
Echoback
Echoback
H'AA
H'XX
H'00
H'55
H'AA
H'FF
Rev. 2.00, 09/04, page 561 of 720
LSI Operation
Processing Contents
Branches to boot program at
reset-start.
• Measures low-level period of receive
• Calculates bit rate and sets it in BRR
• Transmits data H'00 to host as
Echobacks the 2-byte data received
to host.
Echobacks received data to host and
also transfers it to RAM (repeated
for N times)
Checks flash memory data, erases all
flash memory blocks in case of written
data existing, and transmits data H'AA
to host. (If erase could not be done,
transmits data H'FF to host and
aborts operation.)
Branches to programming control
program transferred to on-chip RAM
and starts execution.
Transmits data H'AA to host when
data H'55 is received.
data H'00.
of SCI3.
adjustment end indication.
Boot program initiation

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