HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 225

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Bit
3
2
Bit Name
TGFD
TGFC
Initial
value
0
0
R/W
R/(W)
R/(W)
Description
Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD input
capture or compare match in channels 0, 3, and 4. Only 0
can be written, for flag clearing. In channels 1 and 2, bit 3 is
reserved. It is always read as 0, and should only be written
with 0.
[Setting conditions]
[Clearing conditions]
Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC input
capture or compare match in channels 0, 3, and 4. Only 0
can be written, for flag clearing. In channels 1 and 2, bit 2 is
reserved. It is always read as 0, and should only be written
with 0.
[Setting conditions]
[Clearing conditions]
When TCNT = TGRD and TGRD is functioning as output
compare register
When TCNT value is transferred to TGRD by input
capture signal and TGRD is functioning as input capture
register
When DTC is activated by TGID interrupt and the DISEL
bit of DTMR in DTC is 0
When 0 is written to TGFD after reading TGFD = 1
When TCNT = TGRC and TGRC is functioning as output
compare register
When TCNT value is transferred to TGRC by input
capture signal and TGRC is functioning as input capture
register
When DTC is activated by TGIC interrupt and the DISEL
bit of DTMR in DTC is 0
When 0 is written to TGFC after reading TGFC = 1
Rev. 2.00, 09/04, page 183 of 720

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