HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 231

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.3.11 Timer Output Control Register (TOCR)
TOCR is an 8-bit readable/writable register that enables/disables PWM synchronized toggle
output in complementary PWM mode/reset synchronized PWM mode, and controls output level
inversion of PWM output.
Table 10.26 Output Level Select Function
Note: The reverse phase waveform initial output value changes to active level after elapse of the
Bit
7
6
5 to 2 
1
0
Bit 1
OLSN
0
1
dead time after count start.
Bit Name

PSYE
OLSN
OLSP
Initial Output
High level
Low level
Initial
value
0
0
All 0
0
0
Active Level
Low level
High level
R/W
R
R/W
R
R/W
R/W
Description
Reserved
This bit is always read as 0. Only 0 should be written to this
bit.
PWM Synchronous Output Enable
This bit selects the enable/disable of toggle output
synchronized with the PWM period.
0: Toggle output is disabled
1: Toggle output is enabled
Reserved
These bits are always read as 0. Only 0 should be written to
this bit.
Output Level Select N
This bit selects the reverse phase output level in reset-
synchronized PWM mode/complementary PWM mode. See
table 10.26
Output Level Select P
This bit selects the positive phase output level in reset-
synchronized PWM mode/complementary PWM mode. See
table 10.27
Increment Count
High level
Low level
Function
Compare Match Output
Rev. 2.00, 09/04, page 189 of 720
Decrement Count
Low level
High level