HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 452

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.2
Table 15.1 shows the HCAN2's pins. When using the functions of these external pins, the pin
function controller (PFC) must also be set in line with the HCAN2 settings.
When using HCAN2 pins, settings must be made in HCAN2 configuration mode.
Table 15.1 HCAN2 Pins
A bus driver is necessary for the interface between the pins and the CAN bus. A Renesas
HA13721 compatible model is recommended.
15.3
The HCAN2 has the following registers. For details on register addresses and register states during
each process, refer to appendix A, Internal I/O Register.
• Master control register (MCR)
• General status register (GSR)
• Bit timing configuration register 1 (HCAN2_BCR1*)
• Bit timing configuration register 0 (HCAN2_BCR0*)
• Interrupt request register (IRR)
• Interrupt mask register (IMR)
• Error counter register (TEC/REC)
• Transmit wait registers (TXPR1, TXPR0)
• Transmit wait cancel registers (TXCR1, TXCR0)
• Transmit acknowledge registers (TXACK1, TXACK0)
• Abort acknowledge registers (ABACK1, ABACK0)
• Receive complete registers (RXPR1, RXPR0)
• Remote request registers (RFPR1, RFPR0)
• Mailbox interrupt mask registers (MBIMR1, MBIMR0)
• Unread message status registers (UMSR1, UMSR0)
• Mailboxes (16-bit × 10 registers × 32 sets) (MB0 to MB31)
• Timer counter register (TCNTR)
• Timer control register (TCR)
• Timer status register (TSR)
Rev. 2.00, 09/04, page 410 of 720
Name
HCAN2 transmit data pin
HCAN2 receive data pin
Input/Output Pins
Register Descriptions
HRxD1
Abbreviation
HTxD1
Input/Output
Output
Input
CAN bus transmission pin
CAN bus reception pin
Function