HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 736

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes: 1. The bits 7 to 5 (OVF, WT/IT, and TME) in TCSR are initialized and the bits 2 to 0 (CKS2
Rev. 2.00, 09/04, page 694 of 720
Register
Abbreviation
ADCR_1
FLMCR1
FLMCR2
EBR1
EBR2
UBARH
UBARL
UBAMRH
UBAMRL
UBBR
UBCR
TCSR
TCNT
RSTCSR
SBYCR
SYSCR
MSTCR1
MSTCR2
BCR1
BCR2
WCR1
RAMER
DTEA
DTEB
DTEC
DTED
DTCSR
DTBR
DTEE
DTEF
ADTSR
2. RSTCSR is retained in spite of power-on reset by WDT overflow.
to CKS0) are retained.
Power-On
Reset
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized/
Held*
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Undefined
Initialized
Initialized
Initialized
2
Manual
Reset
Held
Initialized
Initialized
Initialized
Initialized
Held
Held
Held
Held
Held
Held
Initialized
Initialized
Held
Initialized
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Hardware
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Held
Initialized
Initialized
Initialized
Software
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Held
Held
Held
Held
Held
Held
Initialized/
Held*
Initialized
Initialized
Held
Held
Held
Held
Held
Held
Held
Held
Initialized
Initialized
Initialized
Initialized
Initialized
Held
Initialized
Initialized
Held
1
Module
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
—
—
—
—
—
—
—
—
—
—
—
Initialized
Initialized
Initialized
Initialized
Held
Initialized
Initialized
—
Initialized
Sleep
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Held
Module
A/D
FLASH
UBC
WDT
Power-down state
BSC
FLASH
DTC
A/D