HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 597

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.4
The flash memory is controlled by means of the pins shown in table 19.2.
Table 19.2 Pin Configuration
Pin Name
RES
FWP
MD1
MD0
TxD3
(PA9)*
RxD3
(PA8)*
Note:
19.5
The flash memory has the following registers. For details on register addresses and register states
during each processing, see appendix A, Internal I/O Register.
• Flash memory control register 1 (FLMCR1)
• Flash memory control register 2 (FLMCR2)
• Erase block register 1 (EBR1)
• Erase block register 2 (EBR2)
• RAM emulation register (RAMER)
19.5.1
FLMCR1 is a register that makes the flash memory change to program mode, program-verify
mode, erase mode, or erase-verify mode. For details on register setting, see section 19.8, Flash
Memory Programming/Erasing.
*
Register Descriptions
Flash Memory Control Register 1 (FLMCR1)
Input/Output Pins
In boot mode, PA8 and PA9 pins are used as SCI pins.
I/O
Input
Input
Input
Input
Output
Input
Function
Reset
Flash program/erase protection by hardware
Sets this LSI's operating mode
Sets this LSI's operating mode
Serial transmit data output
Serial receive data input
Rev. 2.00, 09/04, page 555 of 720