HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 113

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.8
5.8.1
The value of the stack pointer must always be a multiple of four. If it is not, an address error will
occur when the stack is accessed during exception processing.
5.8.2
The value of the vector base register must always be a multiple of four. If it is not, an address error
will occur when the stack is accessed during exception processing.
5.8.3
When the value of the stack pointer is not a multiple of four, an address error will occur during
stacking of the exception processing (interrupts, etc.) and address error exception processing will
start after the first exception processing is ended. Address errors will also occur in the stacking for
this address error exception processing. To ensure that address error exception processing does not
go into an endless loop, no address errors are accepted at that point. This allows program control
to be shifted to the service routine for address error exception and enables error processing.
When an address error occurs during exception processing stacking, the stacking bus cycle (write)
is executed. During stacking of the status register (SR) and program counter (PC), the value of SP
is reduced by 4 for both of SR and PC, therefore the value of SP is still not a multiple of four after
the stacking. The address value output during stacking is the SP value, so the address itself where
the error occurred is output. This means that the write data stacked is undefined.
Usage Notes
Value of Stack Pointer (SP)
Value of Vector Base Register (VBR)
Address Errors Caused by Stacking of Address Error Exception Processing
Rev. 2.00, 09/04, page 71 of 720