DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 937

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
A/D control/status register
A/D control register
Timer control/status register
Timer counter
Reset control/status register
Timer control register_0
Timer control register_1
Timer control/status register_0
Timer control/status register_1
Time constant register A_0
Time constant register A_1
Time constant register B_0
Time constant register B_1
Timer counter_0
Timer counter_1
Timer counter control register_0
Timer counter control register_1
Timer start register
Timer synchronous register
Timer control register_0
Timer mode register_0
Timer I/O control register H_0
Timer I/O control register L_0
Timer interrupt enable register_0
Timer status register_0
Timer counter_0
Timer general register A_0
Timer general register B_0
Timer general register C_0
Timer general register D_0
Abbreviation
ADCSR
ADCR
TCSR
TCNT
RSTCSR
TCR_0
TCR_1
TCSR_0
TCSR_1
TCORA_0
TCORA_1
TCORB_0
TCORB_1
TCNT_0
TCNT_1
TCCR_0
TCCR_1
TSTR
TSYR
TCR_0
TMDR_0
TIORH_0
TIORL_0
TIER_0
TSR_0
TCNT_0
TGRA_0
TGRB_0
TGRC_0
TGRD_0
Number
of Bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
16
16
Address
H'FFFA0
H'FFFA1
H'FFFA4
H'FFFA5
H'FFFA7
H'FFFB0
H'FFFB1
H'FFFB2
H'FFFB3
H'FFFB4
H'FFFB5
H'FFFB6
H'FFFB7
H'FFFB8
H'FFFB9
H'FFFBA
H'FFFBB
H'FFFBC
H'FFFBD
H'FFFC0
H'FFFC1
H'FFFC2
H'FFFC3
H'FFFC4
H'FFFC5
H'FFFC6
H'FFFC8
H'FFFCA
H'FFFCC
H'FFFCE
Rev.1.00 Sep. 08, 2005 Page 887 of 966
Module
A/D
A/D
WDT
WDT
WDT
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
TPU
TPU
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
Section 23 List of Registers
Data
Width
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
REJ09B0219-0100
Access
Cycles
(Read/Write)
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/3Pφ
2Pφ/3Pφ
2Pφ/3Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ