DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 853

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12. Programming is executed. The entry point of the programming program is at the address which
13. The return value in the programming program, the FPFR parameter is determined.
14. Determine whether programming of the necessary data has finished. If more than 128 bytes of
15. After programming finishes, clear FKEY and specify software protection. If this LSI is
11. The parameters required for programming are set. The start address of the programming
destination on the user MAT (FMPAR parameter) is set in general register ER1. The start
address of the program data storage area (FMPDR parameter) is set in general register ER0.
 Example of FMPAR parameter setting: When an address other than one in the user MAT
 Example of FMPDR parameter setting: When the storage destination for the program data
is 16 bytes after #DLTOP (start address of the download destination specified by FTDAR).
Call the subroutine to execute programming by using the following steps.
MOV.L
JSR
NOP
 The general registers other than ER0 or ER1 are held in the programming program.
 R0L is a return value of the FPFR parameter.
 Since the stack area is used in the programming program, a stack area of 128 bytes at the
data are to be programmed, update the FMPAR and FMPDR parameters in 128-byte units, and
repeat steps 11 to 14. Increment the programming destination address by 128 bytes and update
the programming data pointer correctly. If an address which has already been programmed is
written to again, not only will a programming error occur, but also flash memory will be
damaged.
restarted by a reset immediately after programming has finished, secure the reset input period
(period of RES = 0) of at least 100 µs.
area is specified for the start address of the programming destination, even if the
programming program is executed, programming is not executed and an error is returned to
the FPFR parameter. Since the program data for one programming operation is 128 bytes,
the lower eight bits of the address must be H'00 or H'80 to be aligned with the 128-byte
boundary.
is flash memory, even if the programming routine is executed, programming is not
executed and an error is returned to the FPFR parameter. In this case, the program data
must be transferred to the on-chip RAM and then programming must be executed.
maximum must be allocated in RAM.
#DLTOP+16,ER2
@ER2
; Set entry address to ER2
; Call programming routine
Section 20 Flash Memory (0.18-µm F-ZTAT Version)
Rev.1.00 Sep. 08, 2005 Page 803 of 966
REJ09B0219-0100