DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 779

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note: 1.
2.
No
No
No
Set ACKBT = 0 (ICIER)
Set ACKBT = 1 (ICIER)
Set RCVD = 1 (ICCRA)
Set RCVD = 0 (ICCRA)
Do not generate an interrupt during steps [1] to [3].
For one-byte reception, steps [2] to [6] do not need to be executed. After step [1], execute step [7].
In step [8], read ICDRR (dummy read).
Set TRS = 0 (ICCRA)
Set MST = 0 (ICCRA)
Master receive mode
Dummy read ICDRR
Read RDRF in ICSR
Write BBSY = 0 and
Clear TEND in ICSR
Clear TDRE in ICSR
Clear STOP in ICSR
Read STOP in ICSR
Dummy read ICSR
Read ICDRR
Read ICDRR
Read ICDRR
RDRF = 1?
receive -1?
RDRF = 1?
STOP = 1?
Figure 16.15 Sample Flowchart for Master Receive Mode
SCP = 0
Last
End
Yes
Yes
Yes
No
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Clear the STOP flag
[11] Issue the stop condition
[12] Wait for the creation of stop condition
[13] Read the receive data of the last byte
[14] Clear RCVD to 0
[15] Set to slave receive mode
Clear TEND, set to master receive mode, then clear TDRE*
Set acknowledge to the transmitting device*
Dummy read ICDRR*
Wait for 1 byte of data to be received*
Check if (last receive -1)*
Read the receive data*
Set acknowledge of the last byte. Disable continuous reception
(RCVD = 1).*
Read receive data of (last byte -1).*
Wait for the last byte to be received
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Rev.1.00 Sep. 08, 2005 Page 729 of 966
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Section 16 I
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C Bus Interface2 (IIC2)
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REJ09B0219-0100
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