DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 73

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• Stack Structure
2.2.4
The program area is extended to 4 Gbytes as compared with that in advanced mode.
• Address Space
• Extended Registers (En)
• Instruction Set
• Exception Vector Table and Memory Indirect Branch Addresses
The stack structure of PC at a subroutine branch and that of PC and CCR at an exception
handling are shown in figure 2.5. The PC contents are saved or restored in 24-bit units.
The maximum address space of 4 Gbytes can be linearly accessed.
The extended registers (E0 to E7) can be used as 16-bit registers or as the upper 16-bit
segments of 32-bit registers or address registers.
All instructions and addressing modes can be used.
In maximum mode, the top area starting at H'00000000 is allocated to the exception vector
table. One branch address is stored per 32 bits. The structure of the exception vector table is
shown in figure 2.6.
Maximum Mode
SP
Notes: 1.
Figure 2.5 Stack Structure (Middle and Advanced Modes)
2.
3.
(a) Subroutine Branch
When EXR is not used it is not stored on the stack.
SP when EXR is not used.
Ignored on return.
Reserved
(24 bits)
PC
(SP
SP
*
2
)
(b) Exception Handling
Rev.1.00 Sep. 08, 2005 Page 23 of 966
Reserved*
(24 bits)
EXR*
CCR
PC
1
1
, *
3
REJ09B0219-0100
Section 2 CPU