DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 564

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 12 8-Bit Timers (TMR)
Table 12.3 Clock Input to TCNT and Count Condition (Units 2 and 3)
Note:
Rev.1.00 Sep. 08, 2005 Page 514 of 966
REJ09B0219-0100
Channel
TMR_4
TMR_5
All
*
If the clock input of channel 4 is the TCNT_1 overflow signal and that of channel 5 is the
TCNT_0 compare match signal, no incrementing clock is generated. Do not use this
setting.
Bit 2
CKS2
0
0
0
0
1
0
0
0
0
1
1
1
1
0
Bit 1
CKS1
0
0
1
1
0
0
0
1
1
0
1
1
TCR
Bit 0
CKS0
0
1
0
1
0
0
1
0
1
0
1
0
1
Bit 1
ICKS1

0
0
1
1
0
0
1
1
0
0
1
1


0
0
1
1
0
0
1
1
0
0
1
1




TCCR
Bit 0
ICKS0 Description

0
1
0
1
0
1
0
1
0
1
0
1


0
1
0
1
0
1
0
1
0
1
0
1




Clock input prohibited
Uses internal clock. Counts at rising edge of Pφ/8.
Uses internal clock. Counts at rising edge of Pφ/2.
Uses internal clock. Counts at rising edge of Pφ/64.
Uses internal clock. Counts at rising edge of Pφ/32.
Uses internal clock. Counts at rising edge of Pφ/8192.
Uses internal clock. Counts at rising edge of Pφ/1024.
Uses internal clock. Counts at rising edge of Pφ.
Clock input prohibited
Uses internal clock. Counts at rising edge of Pφ/8.
Uses internal clock. Counts at rising edge of Pφ/2.
Uses internal clock. Counts at rising edge of Pφ/64.
Uses internal clock. Counts at rising edge of Pφ/32.
Uses internal clock. Counts at rising edge of Pφ/8192.
Uses internal clock. Counts at rising edge of Pφ/1024.
Uses internal clock. Counts at rising edge of Pφ.
Setting prohibited
Setting prohibited
Setting prohibited
Uses internal clock. Counts at falling edge of Pφ/8.
Uses internal clock. Counts at falling edge of Pφ/2.
Uses internal clock. Counts at falling edge of Pφ/64.
Uses internal clock. Counts at falling edge of Pφ/32.
Uses internal clock. Counts at falling edge of Pφ/1024.
Counts at TCNT_1 overflow signal*.
Uses internal clock. Counts at falling edge of Pφ/8.
Uses internal clock. Counts at falling edge of Pφ/2.
Uses internal clock. Counts at falling edge of Pφ/64.
Uses internal clock. Counts at falling edge of Pφ/32.
Uses internal clock. Counts at falling edge of Pφ/1024.
Counts at TCNT_0 compare match A*.