DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 215

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2)
n externally extended mode, all of area 1 is external address space. In on-chip ROM enabled
extended mode, the space excluding on-chip ROM is external address space.
When area 1 external address space is accessed, the CS1 signal can be output.
Either of the basic bus interface, byte control SRAM, or burst ROM interface can be selected for
area 1 by bit BSRM1 in BROMCR and bit BCSEL1 in SRAMCR. Table 6.8 shows the external
interface of area 1.
Table 6.8
(3)
In externally extended mode, all of area 2 is external address space.
When area 2 external address space is accessed, the CS2 signal can be output.
Either the basic bus interface or byte control SRAM interface can be selected for area 2 by bit
BCSEL2 in SRAMCR. Table 6.9 shows the external interface of area 2.
Table 6.9
Interface
Basic bus interface
Byte control SRAM interface
Burst ROM interface
Setting prohibited
Interface
Basic bus interface
Byte control SRAM interface
Area 1
Area 2
Area 1 External Interface
Area 2 External Interface
BSRM1 of BROMCR
0
0
1
1
BCSEL2 of SRAMCR
0
1
Register Setting
Register Setting
Rev.1.00 Sep. 08, 2005 Page 165 of 966
BCSEL1 of SRAMCR
0
1
0
1
Section 6 Bus Controller (BSC)
REJ09B0219-0100

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