DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 252

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
6.9.6
An extension cycle (Tmaw) can be inserted between Tma1 and Tma2 cycles to extend the AH
signal output period by setting the ADDEX bit in MPXCR. By inserting the Tmaw cycle, the
address setup for AH and the AH minimum pulse width can be assured.
Figure 6.32 shows the access timing when the address cycle is three cycles.
Rev.1.00 Sep. 08, 2005 Page 202 of 966
REJ09B0219-0100
Read
Write
Address Cycle Control
B
Address bus
CSn
AH
RD
D15 to D0
LHWR
LLWR
D15 to D0
BS
RD/WR
DACK
Figure 6.32 Access Timing of 3 Address Cycles (ADDEX = 1)
Note: n = 3 to 7
T
ma1
Address cycle
Address
T
Address
maw
T
ma2
T
1
Data cycle
Write data
Read data
T
2