DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 858

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 20 Flash Memory (0.18-µm F-ZTAT Version)
In consideration of these conditions, the areas in which the program data can be stored and
executed are determined by the combination of the processing contents, operating mode, and bank
structure of the memory MATs, as shown in tables 20.8 to 20.10.
Table 20.8 Executable Memory MAT
Table 20.9 Usable Area for Programming in User Program Mode
Note:
Rev.1.00 Sep. 08, 2005 Page 808 of 966
REJ09B0219-0100
Processing Contents
Programming
Erasing
Item
Storage area for program data
Operation for selecting on-chip
program to be downloaded
Operation for writing H'A5 to FKEY
Execution of writing 1 to SCO bit in
FCCS (download)
Operation for clearing FKEY
Decision of download result
Operation for download error
Operation for setting initialization
parameter
Execution of initialization
Decision of initialization result
Operation for initialization error
NMI handling routine
Operation for disabling interrupts
Operation for writing H'5A to FKEY
Operation for setting programming
parameter
Execution of programming
Decision of programming result
Operation for programming error
Operation for clearing FKEY
*
Transferring the program data to the on-chip RAM beforehand enables this area to be
used.
Operating Mode
User Program Mode
See Table 20.9
See Table 20.10
On-Chip RAM
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Storable/Executable Area
User MAT
×*
O
O
×
O
O
O
O
×
O
O
×
O
O
×
×
×
×
×
User MAT

O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Selected MAT
Embedded
Program
Storage MAT

O