DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 281

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

A block diagram of the DMAC is shown in figure 7.1.
Internal activation sources
Internal activation
source detector
[Legend]
DSAR_n:
DDAR_n:
DOFR_n:
DTCR_n:
DBSR_n:
DMDR_n:
DACR_n:
DMRSR_n: DMA module request select register
Interrupt signals
requested to the
CPU by each
channel
DMRSR_n
...
External pins
DREQn
DACKn
TENDn
DMA source address register
DMA destination address register
DMA offset register
DMA transfer count register
DMA block size register
DMA mode control register
DMA address control register
Figure 7.1 Block Diagram of DMAC
Controller
DMDR_n
DACR_n
Module data bus
Internal address bus
Address buffer
Operation unit
Operation unit
DREQn: DMA transfer request
DACKn: DMA transfer acknowledge
TENDn: DMA transfer end
n = 0 to 3
DOFR_n
DDAR_n
DBSR_n
DSAR_n
DTCR_n
Rev.1.00 Sep. 08, 2005 Page 231 of 966
Section 7 DMA Controller (DMAC)
Internal data bus
Data buffer
REJ09B0219-0100