DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 628

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 Serial Communication Interface (SCI, IrDA, CRC)
14.3.11 Serial Extended Mode Register 5 and 6 (SEMR_5 and SEMR_6)
SEMR_5 and SEMR_6 select the clock source in asynchronous mode of SCI_5 and SCI_6. The
base clock is automatically specified when the average transfer rate operation is selected. TMQ
output in TMR unit 2 and unit 3 can also be set as the serial transfer base clock. Figure 14.3
describes the examples of base clock features when the average transfer rate operation is selected.
Figure 14.4 describes the examples of base clock features when the TMO output in TMR is
selected.
Rev.1.00 Sep. 08, 2005 Page 578 of 966
REJ09B0219-0100
Bit
7 to 5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
ABCS
ACS3
ACS2
ACS1
ACS0
Undefined
R
7
Initial
Value
Undefined R
0
0
0
0
0
Undefined
R
6
Undefined
R/W
R/W
R/W
R/W
R/W
R/W
R
5
Description
Reserved
These bits are always read as undefined and cannot be
modified.
Asynchronous Mode Base Clock Select (valid only in
asynchronous mode)
Selects the base clock for a 1-bit period.
0: The base clock has a frequency 16 times the transfer
1: The base clock has a frequency 8 times the transfer
Asynchronous Mode Clock Source Select
These bits select the clock source for the average
transfer rate function in the asynchronous mode. When
the average transfer rate function is enabled, the base
clock is automatically specified regardless of the ABCS
bit value. The average transfer rate only corresponds to
8MHz, 10.667MHz, 12MHz, 16MHz, 24MHz, and
32MHz. No other clock is available. Setting of ACS3 to
ACS0 must be done in the asynchronous mode (the
C/A bit in SMR = 0) and the external clock input mode
(the CKE bit I SCR = 1). The setting examples are in
figures 14.3 and 14.4.
(Each number in the four-digit number below
corresponds to the value in the bits ACS3 to ACS0 from
left to right respectively.)
rate
rate
ABCS
R/W
4
0
ACS3
R/W
3
0
ACS2
R/W
2
0
ACS1
R/W
1
0
ACS0
R/W
0
0

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