DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 298

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 7 DMA Controller (DMAC)
7.3.7
DACR specifies the operating mode and transfer method.
Rev.1.00 Sep. 08, 2005 Page 248 of 966
REJ09B0219-0100
Bit
31
30
29 to 27 
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
DMA Address Control Register (DACR)
Bit Name
AMS
DIRS
DARIE
SARIE
AMS
R/W
R/W
R/W
31
23
15
R
0
0
0
7
0
Initial
Value
0
0
0
DIRS
R/W
30
22
14
R
R
R
0
0
0
6
0
R/W
R/W
R/W
R/W
SAT1
R/W
29
21
13
R
R
R
0
0
0
5
0
Description
Address Mode Select
Selects address mode from single or dual address
mode. In single address mode, the DACK pin is enabled
according to the DACKE bit.
0: Dual address mode
1: Single address mode
Single Address Direction Select
Specifies the data transfer direction in single address
mode. This bit s ignored in dual address mode.
0: Specifies DSAR as source address
1: Specifies DDAR as destination address
Reserved
These bits are always read as 0 and cannot be
modified.
DARA4
SARA4
SAT0
R/W
R/W
R/W
28
20
12
R
0
0
0
4
0
SARA3
DARA3
R/W
R/W
27
19
11
R
R
0
0
0
3
0
SARA2
DARA2
RPTIE
R/W
R/W
R/W
26
18
10
R
0
0
0
2
0
DARA1
SARA1
ARS1
DAT1
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
SARA0
DARA0
ARS0
DAT0
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0

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