DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 264

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
(5)
A cycle in which an external space is not accessed due to internal operations is called an external
NOP cycle. Even when an external NOP cycle occurs between consecutive external bus cycles, an
idle cycle can be inserted. In this case, the number of external NOP cycles is included in the
number of idle cycles to be inserted.
Figure 6.41 shows an example of external NOP and idle cycle insertion.
Rev.1.00 Sep. 08, 2005 Page 214 of 966
REJ09B0219-0100
B
Address bus
CS (area A)
CS (area B)
RD
Data bus
External NOP Cycles and Idle Cycles
(Condition: Number of idle cycles to be inserted when different reads continue: 4 cycles)
T
1
Preceding bus cycle
T
2
Figure 6.41 Idle Cycle Insertion Example
T
pw
T
3
including no external access cycles (NOP)
Specified number of idle cycles or more
No external access
(NOP)
(remaining)
T
Idle cycle
i
T
i
T
1
Following bus cycle
T
2
T
pw
T
3