DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 526

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
10.10.9 Conflict between TGR Write and Input Capture
If the input capture signal is generated in the T2 state of a TGR write cycle, the input capture
operation takes precedence and the write to TGR is not performed.
Figure 10.51 shows the timing in this case.
Rev.1.00 Sep. 08, 2005 Page 476 of 966
REJ09B0219-0100
P
Address
Read
Input capture
signal
TGR
Internal data
bus
P
Address
Write
Input capture
signal
TCNT
TGR
Figure 10.51 Conflict between TGR Write and Input Capture
Figure 10.50 Conflict between TGR Read and Input Capture
X
TGR write cycle
TGR address
TGR read cycle
T
TGR address
1
T
1
M
T
2
M
T
M
2
M