DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 826

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 Flash Memory (0.18-µm F-ZTAT Version)
(5)
FTDAR specifies the start address of the on-chip RAM at which to download an on-chip program.
FTDAR must be set before setting the SCO bit in FCCS to 1.
Rev.1.00 Sep. 08, 2005 Page 776 of 966
REJ09B0219-0100
Bit
7
6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Flash Transfer Destination Address Register (FTDAR)
Bit Name
TDER
TDA6
TDA5
TDA4
TDA3
TDA2
TDA1
TDA0
TDER
R/W
7
0
Initial
Value
0
0
0
0
0
0
0
0
TDA6
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TDA5
R/W
5
0
Description
Transfer Destination Address Setting Error
This bit is set to 1 when an error has occurred in setting
the start address specified by bits TDA6 to TDA0.
A start address error is determined by whether the value
set in bits TDA6 to TDA0 is within the range of H'00 to
H'02 when download is executed by setting the SCO bit
in FCCS to 1. Make sure that this bit is cleared to 0
before setting the SCO bit to 1 and the value specified
by bits TDA6 to TDA0 should be within the range of
H'00 to H'02.
0: The value specified by bits TDA6 to TDA0 is within
1: The value specified by bits TDA6 to TDA0 is between
Transfer Destination Address
Specifies the on-chip RAM start address of the
download destination. A value between H'00 and H'02,
and up to 4 kbytes can be specified as the start address
of the on-chip RAM.
H'00:
H'01:
H'02:
H'03 to H'7F: Setting prohibited.
the range.
H'03 and H'FF and download has stopped.
TDA4
R/W
4
0
H'FF9000 is specified as the start
address.
H'FFA000 is specified as the start
address.
H'FFB000 is specified as the start
address.
(Specifying a value from H'03 to H'7F sets
the TDER bit to 1 and stops download of
the on-chip program.)
TDA3
R/W
3
0
TDA2
R/W
2
0
TDA1
R/W
1
0
TDA0
R/W
0
0

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