DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 546

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 Programmable Pulse Generator (PPG)
1. Set up the TPU channel to be used as the output trigger channel so that TGRA and TGRB are
2. Write H'FF to NDERL, and set bits G1CMS1, G1CMS0, G0CMS1, and G0CMS0 in PCR to
3. The timer counter in the TPU channel starts. When a compare match with TGRB occurs,
4. 4-phase complementary non-overlapping pulse output can be obtained subsequently by writing
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REJ09B0219-0100
output compare registers. Set the cycle in TGRB and the non-overlapping margin in TGRA,
and set the counter to be cleared by compare match B. Set the TGIEA bit in TIER to 1 to
enable the TGIA interrupt.
select compare match in the TPU channel set up in the previous step to be the output trigger.
Set bits G1NOV and G0NOV in PMR to 1 to select non-overlapping pulse output.
Write output data H'95 to NDRL.
outputs change from 1 to 0. When a compare match with TGRA occurs, outputs change from 0
to 1 (the change from 0 to 1 is delayed by the value set in TGRA).
The TGIA interrupt handling routine writes the next output data (H'65) to NDRL.
H'59, H'56, H'95... at successive TGIA interrupts.
If the DTC or DMAC is set for activation by a TGIA interrupt, pulse can be output without
imposing a load on the CPU.