DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 391

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 9.1 summarizes the port functions. The pins of each port also have other functions such as
input/output pins of on-chip peripheral modules or external interrupt input pins. Each I/O port
includes a data direction register (DDR) that controls input/output, a data register (DR) that stores
output data, a port register (PORT) used to read the pin states, and an input buffer control register
(ICR) that controls input buffer on/off. Port 5 does not have a DR or a DDR register.
Ports D to F, H, and I have internal input pull-up MOSs and a pull-up MOS control register (PCR)
that controls the on/off state of the input pull-up MOSs.
Ports 2 and F include an open-drain control register (ODR) that controls on/off of the output
buffer PMOSs.
All of the I/O ports can drive a single TTL load and capacitive loads up to 30 pF.
All of the I/O ports can drive Darlington transistors when functioning as output ports.
Port 2 is Schmitt-trigger input. Schmitt-trigger inputs for other ports are enabled when used as the
IRQ, TPU, TMR, or IIC2 inputs.
Table 9.1
Port
Port 1
Description
General I/O port
also functioning
as interrupt inputs,
SCI I/Os, DMAC
I/Os, A/D
converter inputs,
TPU inputs, and
IIC2 I/Os
Port Functions
Bit
6
5
4
3
7
I/O
P17/SCL0
P16/SDA0
P15/SCL1
P14/SDA1
P13
Section 9 I/O Ports
Input
IRQ7-A/
TCLKD-B
IRQ6-A/
TCLKC-B
IRQ5-A/
TCLKB-B/
RxD5/
IrRXD
DREQ1-A/
IRQ4-A/
TCLKA-B
ADTRG0/
IRQ3-A
Function
Output
DACK1-A
TEND1-A
TxD5/
IrTxD
Rev.1.00 Sep. 08, 2005 Page 341 of 966
Schmitt-
Trigger
Input*
IRQ7-A,
TCLKD-B,
SCL0
IRQ6-A,
TCLKC-B,
SDA0
IRQ5-A,
TCLKB-B,
SCL1
IRQ4-A,
TCLKA-B,
SDA1
IRQ3-A
1
Input
Pull-up
MOS
Function
Section 9 I/O Ports
REJ09B0219-0100
Open-
Drain
Output
Function

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