DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 309

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.5.2
(1)
In normal transfer mode, one data access size of data is transferred at a single transfer request. Up
to 4 Gbytes can be specified as a total transfer size by DTCR. DBSR is ignored in normal transfer
mode.
The TEND signal is output only in the last DMA transfer. The DACK signal is output every time a
transfer request is received and a transfer starts.
Figure 7.7 shows an example of the signal timing in normal transfer mode and figure 7.8 shows
the operation in normal transfer mode.
Normal Transfer Mode
Transfer Modes
External request transfer in single address mode:
Auto request transfer in dual address mode:
Figure 7.7 Example of Signal Timing in Normal Transfer Mode
Bus cycle
TEND
DREQ
Bus cycle
DACK
Read
DMA transfer
cycle
Write
DMA
Read
Last DMA
transfer cycle
Rev.1.00 Sep. 08, 2005 Page 259 of 966
Write
Section 7 DMA Controller (DMAC)
DMA
REJ09B0219-0100