DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 12

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 3 MCU Operating Modes ....................................................................... 61
3.1
3.2
3.3
3.4
Section 4 Exception Handling ............................................................................. 73
4.1
4.2
4.3
4.4
4.5
Rev.1.00 Sep. 08, 2005 Page x of xlviii
2.8.3
2.8.4
2.8.5
2.8.6
2.8.7
2.8.8
2.8.9
2.8.10 Memory Indirect—@@aa:8 ................................................................................... 56
2.8.11 Extended Memory Indirect—@@vec:7 ................................................................. 57
2.8.12 Effective Address Calculation ................................................................................ 57
2.8.13 MOVA Instruction.................................................................................................. 59
Operating Mode Selection ................................................................................................... 61
Register Descriptions........................................................................................................... 62
3.2.1
3.2.2
Operating Mode Descriptions .............................................................................................. 66
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
Address Map ........................................................................................................................ 69
3.4.1
Exception Handling Types and Priority............................................................................... 73
Exception Sources and Exception Handling Vector Table .................................................. 74
Reset .................................................................................................................................... 76
4.3.1
4.3.2
4.3.3
Traces................................................................................................................................... 79
Address Error....................................................................................................................... 80
Register Indirect with Displacement —@(d:2, ERn), @(d:16, ERn),
or @(d:32, ERn) ..................................................................................................... 52
Index Register Indirect with Displacement—@(d:16,RnL.B), @(d:32,RnL.B),
@(d:16,Rn.W), @(d:32,Rn.W), @(d:16,ERn.L), or @(d:32,ERn.L)..................... 52
Register Indirect with Post-Increment, Pre-Decrement, Pre-Increment,
or Post-Decrement—@ERn+, @−ERn, @+ERn, or @ERn− ................................ 53
Absolute Address—@aa:8, @aa:16, @aa:24, or @aa:32....................................... 54
Immediate—#xx ..................................................................................................... 55
Program-Counter Relative—@(d:8, PC) or @(d:16, PC) ...................................... 55
Program-Counter Relative with Index Register—@(RnL.B, PC), @(Rn.W, PC),
or @(ERn.L, PC) .................................................................................................... 55
Mode Control Register (MDCR) ............................................................................ 62
System Control Register (SYSCR)......................................................................... 64
Mode 2.................................................................................................................... 66
Mode 4.................................................................................................................... 66
Mode 5.................................................................................................................... 66
Mode 6.................................................................................................................... 67
Mode 7.................................................................................................................... 67
Pin Functions .......................................................................................................... 68
Address Map........................................................................................................... 69
Reset Exception Handling ...................................................................................... 76
Interrupts after Reset............................................................................................... 77
On-Chip Peripheral Functions after Reset Release................................................. 77