dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 93

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.2.2.4
The address of the operand is in the address register Rj or SP. After the operand address is used, the
contents of the N register are added to Rn and stored in the same address register. The content of N is
treated as a two’s-complement signed number. The contents of the N register are unchanged. The type of
arithmetic (linear or modulo) used to update Rn is determined by M01 for R0 and R1 and is always linear
for R2, R3, and SP. This reference is classified as a memory reference. See Figure 4-6.
Freescale Semiconductor
Assembler syntax: X:(Rj)+N, X:(SP)+N, P:(Rj)+N
Additional instruction execution cycles: 0
Additional effective address program words: 0
Y
Post-Update by Offset N: (Rj)+N, (SP)+N
31
$3204
$3200
5
M01
R2
N
5
Before Execution
Y1
15
15
15
15
Figure 4-6. Address Register Indirect: Post-Update by Offset N
X
X
5
X Memory
Post-Update by Offset N Example
$FFFF
$3200
$0004
X
X
5
16 15
X
X
A
X
X
0
0
0
A
0
Y0
A
Address Generation Unit
A
0
: MOVE Y1,X:(R2)+N
Y
31
$3204
$3200
5
M01
R2
N
5
Y1
15
15
15
15
After Execution
X
5
5
X Memory
$FFFF
$3204
$0004
X
5
5
16 15
X
5
A
X
5
0
0
0
A
0
Y0
Addressing Modes
A
A
0
AA0019
4-13

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