dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 107

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
When modulo arithmetic is performed on the buffer pointer register, only the low-order k bits are
modified; the upper 16 - k bits are held constant, fixing the address range of the buffer. The algorithm used
to update the pointer register (R0 in this case) is as follows:
Note that this algorithm can result in some memory addresses being unavailable. If the size of the buffer is
not an even power of two, there will be a range of addresses between M and 2
example) that are not addressable. Section 4.3.2.7.3, “Memory Locations Not Available for Modulo
Buffers,” addresses this issue in greater detail.
4.3.2.2
As noted in Section 4.3.2.1, “Modulo Arithmetic Overview,” modulo arithmetic is enabled by
programming the address modifier register, M01. This single register enables modulo arithmetic for both
the R0 and R1 registers, although in order for modulo arithmetic to be enabled for the R1 register it must
be enabled for the R0 register as well. When both pointers use modulo arithmetic, the sizes of both buffers
are the same. They can refer to the same or different buffers as desired.
The possible configurations of the M01 register are given in Table 4-9.
Freescale Semiconductor
Upper Boundary:
Lower Boundary:
R0[15:k] = R0[15:k]
R0[k-1:0] = (R0[k-1:0] + offset) MOD (M01 + 1)
Configuring Modulo Arithmetic
Register Contents
16-Bit M01
$0000
$0001
$0002
$00B0
$00A4
$009F
$0080
Table 4-9. Programming M01 for Modulo Arithmetic
Figure 4-16. Circular Buffer with Size M=37
(Unavailable
Addresses)
Memory
Circular
Buffer
(Reserved)
Modulo 2
Modulo 3
Address Generation Unit
Address Arithmetic
Performed
Lower Bound Relative to R0
Lower Bound + Size - 1 = Upper Bound
Initial R0 Pointer Value
R0 pointer only
R0 pointer only
Pointer Registers
Affected
k
-1 (37 and 63 in our
AGU Address Arithmetic
4-27

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