dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 156

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Instruction Set Introduction
6-24
Operation
ASRAC
LSRAC
ASRR
ASLL
LSRR
LSLL
ROR
ASR
ROL
ASL
LSL
LSR
Table 6-28. Data ALU Shifting Instructions
Y1,X0,FDD
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
Y1,X0,FDD
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
Y1,X0,FDD
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
Y1,X0,FDD
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
Operands
(parallel)
(parallel)
Y1,X0,F
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
Y1,X0,F
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
FDD
FDD
FDD
FDD
FDD
DD
F
DSP56800 Family Manual
C
2
2
2
2
2
2
2
2
2
2
2
2
W
1
1
1
1
1
1
1
1
1
1
1
1
Arithmetic shift left entire register by 1 bit
ALIAS, refer to Section 6.5.3, “ASL Alias.”
Implemented as: LSL DD
Refer to Table 6-35.
Arithmetic shift left of the first operand by value
specified in four LSBs of the second operand;
places result in FDD
Arithmetic shift right entire register by 1 bit
Refer to Table 6-35.
Arithmetic shift right of the first operand by value
specified in four LSBs of the second operand;
places result in FDD
Arithmetic word shifting with accumulation
1-bit logical shift left of word
ALIAS, refer to Section 6.5.2, “LSLL Alias.”
Implemented as: ASLL <operands>
1-bit logical shift right of word
Logical shift right of the first operand by value
specified in four LSBs of the second operand;
places result in FDD (when result is to an accumu-
lator F, zero extends into F2)
Logical word shifting with accumulation
Rotate 16-bit register left by 1 bit through the carry
bit
Rotate 16-bit register right by 1 bit through the
carry bit
Comments
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