dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 393

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
TSTW
Operation:
S - 0
Description: Compare 16 bits of the specified source register or memory location with zero, and set the condition
Example:
Explanation of Example:
Note:
Condition Codes Affected:
Freescale Semiconductor
codes accordingly. No result is stored, although the condition codes are updated. If the source is an
accumulator, limiting can occur if the extension register (FF2) is in use.
TSTW
Prior to execution, location X:$0007 contains the value $FC00 and the 16-bit SR contains the value
$0300. Execution of the instruction compares the value in memory location X:$0007 with zero and up-
dates the CCR accordingly. The value of location X:$0007 is not affected.
This instruction does not set the same set of condition codes that the TST instruction does. Both in-
structions correctly set the V, N, Z, and C bits, but TST sets the E bit and TSTW does not. This is a
16-bit test operation when done on an accumulator (A or B), where limiting is performed if appropriate
when reading the accumulator.
Before Execution
X:$0007
15
LF
SR
14
*
L
V
Z
V
C
13
*
— Set if overflow has occurred in result
— Set if bit MSB of result is set
— Set if result equals zero
— Always cleared
— Always cleared
X:$0007
12
FC00
0300
*
MR
Test Register or Memory
11
*
10
*
Instruction Set Details
I1
9
Assembler Syntax:
TSTW
I0
8
SZ
7
; set condition codes using X:$0007
L
6
5
E
After Execution
X:$0007
S
4
U
CCR
SR
N
3
Z
2
FC00
0308
V
1
C
0
TSTW
A-163

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