dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 368
dsp56800
Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800.pdf
(448 pages)
- Current page: 368 of 448
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ORC
Operation:
#xxxx + X:<ea> → X:<ea>
#xxxx + D → D
where + denotes the logical inclusive OR operator
Implementation Note:
Description: Logically OR a 16-bit immediate data value with the destination operand (D) and store the results back
Example:
Explanation of Example:
Condition Codes Affected:
A-138
This instruction is an alias to the BFSET instruction, and assembles as BFSET with the 16-bit imme-
diate value used as the bit mask. This instruction will disassemble as a BFSET instruction.
into the destination. C is also modified as described in following discussion. This instruction performs
a read-modify-write operation on the destination and requires two destination accesses.
ORC
Prior to execution, the 16-bit X memory location X:$7C30 contains the value $00AA. Execution of the
instruction tests the state of bits 14, 12, 6, and 4 in X:$7C30; does not set C (because all these bits were
not set); and then sets the bits.
For destination operand SR:
For other destination operands:
Before Execution
X:$7C30
15
LF
SR
14
*
?
L
C
13
*
— Set as defined in the field and if specified in the field
— Set if data limiting occurred during 36-bit source move
— Set if all bits specified by the mask are set
Logical Inclusive OR Immediate
#$5050,X:<<$7C30
12
00AA
0300
*
MR
11
*
DSP56800 Family Manual
10
*
I1
9
Assembler Syntax:
ORC
ORC
I0
8
SZ
7
L
6
5
E
After Execution
X:$7C30
#iiii,X:<ea>
#iiii,D
; OR with immediate data
4
U
CCR
SR
3
N
2
Z
50FA
0300
1
V
Freescale Semiconductor
C
0
ORC
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