dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 397

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Appendix B
DSC Benchmarks
The following benchmarks illustrate source code syntax and programming techniques for the DSP56800.
The assembly language source is organized into five columns, as shown in Example B-1.
In each code example, the number of program words that each instruction occupies and the execution time
(in instruction cycles) for each are listed in the comments and summed at the end.
Table B-1 shows the number of program words and instruction cycles for each benchmark. All the I/O
accesses in this chapter are assumed to be implemented using I/O short addressing mode.
Freescale Semiconductor
Label
FIR:
Real Correlation or Convolution (FIR Filter)
N Complex Multiplies
Complex Correlation or Convolution (Complex FIR)
Nth Order Power Series (Real, Fractional Data)
N Cascaded Real Biquad IIR Filters (Direct Form II)
N Radix 2 FFT Butterflies
LMS Adaptive Filter: Single Precision
1. Used for program entry points and end-of-loop indication.
2. Indicates the data ALU, address ALU, or program-controller operation to be performed. This column must also be
included in the source code.
3. Specifies the operands to be used by the opcode.
4. Specifies an optional data transfer over the data bus and the addressing mode to be used.
5. Word count specified from assembler. Sometimes a 16-bit address is used in order to create the worst case.
6. Cycle count refers to instruction cycle count required to execute the instruction.
7. Used for documentation purposes and does not affect the assembled code.
1
MAC
Opcode
2
Y0,X0,A
Operands
Benchmark
3
X:(R0)+,Y0
Example B-1. Source Code Layout
Table B-1. Benchmark Summary
DSC Benchmarks
Data bus
X:(R3)+,X0
4
Execution Time
w_cnt
; 1
N + 2NTaps
(# Icyc)
14N
5
1N
6N
5N
1N
6N
1
cycles
6
Do each tap
Comment
(# Words)
Program
Length
11
18
17
14
18
32
28
7
B-1