dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 92

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Address Generation Unit
4.2.2.3
The address of the operand is in the address register Rj or SP. After the operand address is used, it is
decremented by one and stored in the same address register. The type of arithmetic (linear or modulo) used
to decrement Rn is determined by M01 for R0 and R1 and is always linear for R2, R3, and SP. The N
register is ignored. This reference is classified as a memory reference. See Figure 4-5.
4-12
B
Assembler syntax: X:(Rj)-, X:(SP)-
Additional instruction execution cycles: 0
Additional effective address program words: 0
35 32 31
Post-Decrement by 1: (Rn)-, (SP)-
B2
0
$4735
$4734
M01
R1
6
N
Before Execution
15
15
15
15
5
X
X
B1
X Memory
$FFFF
4
$4735
Figure 4-5. Address Register Indirect: Post-Decrement
X
X
(n/a)
3
16 15
X
X
Post-Decrement Example
X
X
F
0
0
0
0
E
B0
DSP56800 Family Manual
D
C
0
: MOVE B,X:(R1)-
B
35 32 31
B2
0
$4735
$4734
M01
R1
6
N
15
15
15
15
After Execution
5
6
X
B1
X Memory
$FFFF
$4734
4
5
X
(n/a)
3
16 15
4
X
3
X
F
Freescale Semiconductor
0
0
0
0
E
B0
D
C
0
AA0018

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