dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 225

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

9.2.1
The DSP56800 JTAG port has the following capabilities:
Section 9.2.2, “JTAG Port Architecture,” provides an overview of the port’s architecture and commands.
For additional information on the JTAG port’s implementation and command set, see the appropriate
DSP56800-based device’s user’s manual.
9.2.2
The JTAG module consists of the logic necessary to support boundary scan testing as defined in the IEEE
specification. Although tightly coupled to the DSP56800’s core logic, it is an independent module, and,
when disabled, it is guaranteed to have no impact on the function of the core.
The JTAG port consists of the following components:
These units, and the overall OnCE port architecture, are shown in Figure 9-2 on page 9-4.
Freescale Semiconductor
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Performing boundary scan operations to test circuit-board electrical continuity
Sampling the DSP56800-based device system pins during operation and transparently shifting out
the result in the boundary scan register; preloading values to output pins prior to performing a
boundary scan operation
Querying identification information (manufacturer, part number, and version) from a
DSP56800-based device
Adding a weak pull-up device on all input signals to cause all open inputs to report a logic 1 and to
force a predictable internal state while performing external boundary scan operations
Disabling the output drive to pins during circuit-board testing
Forcing test data onto the outputs of a DSP56800-based device
Providing a means of accessing the OnCE controller and circuits to control a target system
Providing a means of entering the debug mode of operation
Bypassing the DSP56800 core for a given circuit-board test by effectively reducing the boundary
scan register to a single cell
Serial communications interface
Command decoder and interpreter
Boundary scan register
ID register
JTAG Capabilities
JTAG Port Architecture
JTAG and On-Chip Emulation (OnCE™)
JTAG Port
9-3