dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 354

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

MPYR
Operation:
+ S1 * S2 + r → D
Description: Multiply the two signed 16-bit source operands, round the 32-bit fractional product, and place the re-
Usage:
Example:
Explanation of Example:
A-124
S1 * S2 + r → D (single parallel move)
S1 * S2 + r → D (dual parallel read)
Before Execution
A2
0
sult in the destination (D). Both source operands must be located in the FF1 portion of an accumulator
or in X0, Y0, or Y1. The fractional product is sign extended before the rounding operation, and the
result is then stored in the destination. If the destination is one of the 16-bit registers, only the high-or-
der 16 bits of the rounded fractional result are stored. This instruction uses the rounding technique that
is selected by the R bit in the OMR. When the R bit is cleared (default mode), convergent rounding is
selected; when the R bit is set, two’s-complement rounding is selected. Refer to Section 3.5, “Round-
ing,” on page 3-30 for more information about the rounding modes. Note that the rounding operation
will always zero the LSP of the result if the destination (D) is an accumulator.
This instruction is used for multiplication and rounding of fractional data.
MPYR
Prior to execution, the 16-bit X0 register contains the value $4000 (0.5), the 16-bit Y1 register contains
the value $F456 (-0.09112), and the 36-bit A accumulator contains the value $00:1000:1234
(0.12500). Execution of the MPYR -X0,Y1,A instruction multiplies the 16-bit signed value in the X0
register by the 16-bit signed value in Y1, rounds the result, and stores the result ($0:05D5:0000) into
the A accumulator, -X0 * Y1 = 0.04556 (truncated here to 5 decimal places). In this example, the de-
fault rounding (convergent rounding) is performed.
1000
A1
X0
Y1
-X0,Y1,A
Signed Multiply and Round
1234
4000
F456
A0
DSP56800 Family Manual
Assembler Syntax:
MPYR
MPYR
MPYR
After Execution
A2
0
(+)S1,S2,D
S1,S2,D
S1,S2,D
; multiply X0 by Y1 and
;
05D5
A1
negate the product
X0
Y1
(single parallel move)
(dual parallel read)
Freescale Semiconductor
F456
0000
4000
A0
MPYR