dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 307

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
EORC
Operation:
#xxxx ⊕ X:<ea> → X:<ea>
#xxxx ⊕ D → D
where ⊕ denotes the logical exclusive OR operator
Implementation Note:
Description: Logically exclusive OR a 16-bit immediate data value with the destination operand (D) and store the
Example:
Explanation of Example:
Condition Codes Affected:
Freescale Semiconductor
This instruction is an alias to the BFCHG instruction, and assembles as BFCHG with the 16-bit imme-
diate value as the bit mask. This instruction will disassemble as a BFCHG instruction.
results back into the destination. C is also modified as described below. This instruction performs a
read-modify-write operation on the destination and requires two destination accesses.
EORC
Prior to execution, the 16-bit X memory location X:$FFE0 contains the value $5555. Execution of the
instruction performs a logical XOR of the 16-bit immediate data value ($0FF0) with the destination
contents ($5555). In this case, it tests the 8 bits [11:4] in and writes back the result ($5AA5) in desti-
nation X:$FFE0. The C bit is cleared because not all of the tested bits were set.
For destination operand SR:
For other destination operands:
Before Execution
X:$FFE0
LF
15
SR
14
*
?
L
C
13
*
Logical Exclusive OR Immediate
— Changed if specified in the field
— Set if data limiting occurred during 36-bit source move
— Set if all bits specified by the mask are set.
12
5555
0301
*
#$0FF0,X:<<$FFE0
MR
11
*
10
*
Instruction Set Details
I1
9
Assembler Syntax:
EORC
EORC
I0
8
SZ
7
; Exclusive OR with immediate data
L
6
5
E
After Execution
X:$FFE0
#iiii,X:<ea>
#iiii,D
U
4
CCR
SR
N
3
2
Z
5AA5
0300
V
1
C
0
EORC
A-77

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