dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 126

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Program Controller
5.1.9
The operating mode register (OMR) is a 16-bit register that defines the current chip operating mode of the
processor. The OMR bits are affected by processor reset, operations on the HWS, and instructions that
directly reference the OMR. A DO loop will also affect the OMR, specifically the NL bit.
During processor reset, the chip operating mode bits will be loaded from the external mode select pins. The
operating mode register format is shown in Figure 5-5 on page 5-10 and is described in the subsequent
discussion.
5.1.9.1
The chip operating mode (MB and MA) bits (OMR bits 1 and 0) indicate the operating mode and memory
maps of a DSC chip that has an external bus. Their initial values are typically established after reset by
external mode select pins. After the chip leaves the reset state, MB and MA can be changed under program
control. Consult the specific DSP56800 Family device manual for more detailed information about how
these bits are established on reset and about their specific effect on operation.
Possible operating modes for a program RAM part are shown in Table 5-2.
5-10
* Indicates reserved bits that are read as zero and should be written with zero for future compatibility
MB
OMR
Operating Mode
Register
Reset = $0000
Read/Write
0
0
Operating Mode Register
MA
Operating Mode Bits (MB and MA) — Bits 1–0
0
1
When a bit of the OMR is changed by an instruction, a delay of one
instruction cycle is necessary before the new mode comes into effect.
Chip Operating Mode
NL — Nested Looping
CC — Condition Codes
SD — Stop Delay
R — Rounding
SA — Saturation
EX — External X Memory
MA,MB — Operating Mode
NL
15
Figure 5-5. Operating Mode Register (OMR) Format
Bootstrap 0
Bootstrap 1
14
*
Table 5-2. Program RAM Operating Modes
13
*
12
DSP56800 Family Manual
*
11
*
NOTE:
10
*
(Boot from External Bus)
(Boot from Peripheral)
BOOTROM P:$0000
BOOTROM P:$0000
9
*
Reset Vector
CC
8
OMR
7
*
SD
6
R
5
SA
Internal P-RAM is write only
Internal P-RAM is write only
4
(consult specific 56800
Family device manual)
Freescale Semiconductor
Program Memory
EX
3
Configuration
2
*
MB
1
AA0013
MA
0

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