dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 224

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
JTAG and On-Chip Emulation (OnCE™)
As already noted, the JTAG module is the master. It enables interaction with the debug services provided
by the OnCE, and its external serial interface is used by the OnCE port for sending and receiving
debugging commands and data.
9.2
Problems associated with testing high-density circuit boards have led to the development of a proposed
standard under the sponsorship of the Test Technology Committee of IEEE and the Joint Test Action
Group (JTAG). The resulting standard, called the IEEE Standard Test Access Port and Boundary-Scan
Architecture, specifies industry-standard, in-circuit device testing and diagnosis. The DSP56800 family
provides a dedicated test access port (TAP) that is fully compatible with this standard, commonly referred
to as the “JTAG port.”
This section provides an overview of the capabilities of the JTAG port as implemented on the DSP56800.
Information provided here is intended to supplement the supporting IEEE 1149.1a-1993 document, which
outlines the internal details, applications, and overall methodology of the standard. Specific details on the
implementation of the JTAG port for a given DSP56800-based device are provided in that device’s user’s
manual.
9-2
JTAG Port
External
Interface
Figure 9-1. JTAG/OnCE Interface Block Diagram
Controller
JTAG
Access
Test
Port
DSP56800 Family Manual
OnCE Command,
Breakpoint Logic
Status & Control
Event Counter
Trace Logic
Registers
Pipeline
History
Buffer
OnCE
FIFO
XAB1
PAB
PDB
PGDB
PAB
Freescale Semiconductor
AA0093

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