dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 143

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6.5
The DSP56800 assembler provides a number of additional useful instruction mnemonics that are actually
aliases to other instructions. Each of these instructions is mapped to one of the core instructions and
disassembles as such.
6.5.1
The DSP56800 instruction set does not support logical operations using 16-bit immediate data. It is
possible to achieve the same result, however, using the bit-manipulation instructions. To simplify
implementing these operations, the DSP56800 assembler provides the following operations:
These operations are not new instructions, but aliases to existing bit-manipulation instructions. They are
mapped as shown in Table 6-9.
Freescale Semiconductor
ANDC — logically AND a 16-bit immediate value with a destination
EORC — logically exclusive OR a 16-bit immediate value with a destination
ORC — logically OR a 16-bit immediate value with a destination
NOTC — logical one’s-complement of a 16-bit destination
Instruction Aliases
ANDC, EORC, ORC, and NOTC Aliases
Instruction
Instruction
DEBUG
WAIT
STOP
Table 6-9. Aliases for Logical Instructions with Immediate Data
Desired
BRA
NOP
JMP
RTS
SWI
ANDC
JSR
RTI
Jcc
ORC
Table 6-8. Program Control Instruction List (Continued)
Branch
Enter debug mode
Jump conditionally where cc represents condition mnemonic
Jump
Jump to subroutine
No operation
Return from interrupt
Return from subroutine
Stop processing (lowest power standby)
Software interrupt
Wait for interrupt (low power standby)
#xxxx,DST
#xxxx,DST
Operands
Instruction Set Introduction
Description
Instruction
Remapped
BFCLR
BFSET
#xxxx,DST
#xxxx,DST
Operands
Instruction Aliases
6-11

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