dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 322

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

LSRAC
Operation:
S1 >> S2 + D →D
Description: Logically shift the first 16-bit source operand (S1) to the right by the value contained in the lowest
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Timing:
Memory:
A-92
Operation
LSRAC
Before Execution
A2
0
4 bits of the second source operand (S2), and accumulate the result with the value in the destination
(D). Operand S1 is internally zero extended and concatenated with 16 zero bits to form a 36-bit value
before the shift operation. The result is not affected by the state of the saturation bit (SA).
This instruction is used for multi-precision logical right shifts.
LSRAC
Prior to execution, the Y1 register contains the value to be shifted ($C003), the X0 register contains
the amount by which to shift ($0004), and the destination accumulator contains $0:000:0099. The
LSRAC instruction logically shifts the value $C003 four bits to the right and accumulates this result
with the value already in the destination register A. Since the destination is an accumulator, the exten-
sion word (A2) is filled with sign extension.
See Section 3.6.2, “36-Bit Destinations — CC Bit Set,” on page 3-34 and Section 3.6.4, “20-Bit Des-
tinations — CC Bit Set,” on page 3-34 for the case when the CC bit is set.
2 oscillator clock cycles
1 program word
LF
15
0000
A1
14
*
N
Z
Logical Right Shift with Accumulate
13
*
Y1
X0
Operands
— Set if bit 35 of result is set
— Set if result equals zero
Y1,X0,F
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
Y1,X0,A
12
*
MR
11
*
C003
0099
0004
A0
DSP56800 Family Manual
10
*
I1
9
C
2
Assembler Syntax:
LSRAC
I0
8
W
1
SZ
7
After Execution
Logical word shifting with accumulation
A2
6
L
0
5
E
S1,S2,D
; 16-bit add
U
0C00
4
CCR
A1
N
3
Y1
X0
Z
Comments
2
V
1
Freescale Semiconductor
C003
3099
0004
A0
C
0
LSRAC