dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 312

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

INC(W)
Operation:
D + 1 → D
D + 1 → D (single parallel move)
Description: Increment a 16-bit destination by one. If the destination is an accumulator, only the EXT and MSP por-
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
A-82
A Before Execution
A2
0
tions of the accumulator are used and the LSP remain unchanged. The condition codes are calculated
based on the 16-bit result. Duplicate destination is not allowed when this instruction is used in con-
junction with a parallel read
This instruction is typically used when processing integer data.
INCW
Prior to execution, the 36-bit A accumulator contains the value $0:0001:0033. Execution of the
INCW A instruction increments by one the upper 20 bits of the A accumulator.
See Section 3.6.5, “16-Bit Destinations,” on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, “36-Bit Destinations — CC Bit Set,” on page 3-34 and Section 3.6.4, “20-Bit Des-
tinations — CC Bit Set,” on page 3-34 for the case when the CC bit is set.
LF
15
0001
14
A1
*
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
C
13
*
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the signed integer portion of the result is in use
— Set if result is not normalized
— Set if bit 35 of the result is set
— Set if the 20 MSBs of the result are all zeros
— Set if overflow has occurred in result
— Set if a carry (or borrow) occurs from bit 35 of the result
A
12
*
MR
11
*
0033
A0
DSP56800 Family Manual
10
Increment Word
X:(R0)+,X0
*
I1
9
Assembler Syntax:
INCW
INCW
I0
8
SZ
7
A After Execution
L
6
A2
0
E
5
D
D
; Increment the 20 MSBs of A
;
U
4
CCR
0002
A1
update X0 and R0
N
3
(single parallel move)
Z
2
V
1
Freescale Semiconductor
0033
C
0
A0
INC(W)