dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 329

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MACR
Parallel Moves:
Parallel Dual Reads:
Timing:
Memory:
Freescale Semiconductor
Operation
MACR
1.
are executing from data memory).
2.
mode.
Data ALU Operation
This parallel instruction is not allowed when the XP bit in the OMR is set (that is, when the instructions
This instruction occupies only 1 program word and executes in 1 instruction cycle for every addressing
2 + mv oscillator clock cycles for MACR instructions with a parallel move
2 oscillator clock cycles for MACR instructions without parallel move
1 program word
2
Operation
1.
cle for every addressing mode.
2.
as the destination of the parallel read operation. Memory writes are allowed in this
case.
MACR
(F = A or B)
Data ALU Operation
This instruction occupies only 1 program word and executes in 1 instruction cy-
The destination of the data ALU operation is not allowed to be the same register
Operands
Y1,X0,F
Y1,Y0,F
Y0,X0,F
1
Multiply-Accumulate and Round
1
(F = A or B)
Operands
Y1,X0,F
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
X:(R0)+N
X:(R1)+N
Source 1
X:(R0)+
X:(R1)+
Instruction Set Details
First Memory Read
X:(Rn)+N
X:(Rn)+
Source
Destination 1
X0
Y1
Y0
A1
B1
A
B
Y0
Y1
Parallel Memory Move
Source 2
X:(R3)+
X:(R3)-
Destination
X:(Rn)+N
Second Memory Read
X:(Rn)+
X0
Y1
Y0
A1
B1
A
B
2
Destination 2
MACR
X0
A-99

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