dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 191

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The NEG instruction can be used directly, executing in one instruction cycle, in cases where it is already
known that the least significant portion (LSP) of an accumulator is $0000. This is true immediately after a
value is moved to the A or B accumulator from memory or a register, as shown in the following code:
; Example of 1 Icyc NEGW Operation
; Works because A0 is already equal to $0000
The technique shown in the following code can be used for cases when 16-bit data is being processed and
when it can be guaranteed that the LSP or extension register of the accumulator contains no required
information:
; 16-bit NEGW Operation
; Operates on MSP, Forces EXT to sign extension, LSP to $0, 2 Icyc
The following technique may be used for the case where the CC bit in the SR is set to a 1, the LSP may not
be $0000, and the user is not interested in the values in the accumulator extension registers:
; 16-bit NEGW Operation
; CC bit must be set, operates on MSP, doesn’t affect A0, 2 Icyc
8.1.2.2
Although the NEG instruction is supported on accumulators only, NEG can be emulated to perform a
negation of the data ALU’s X0, Y0, or Y1 registers, as shown in the following code:
; NEG Operation
; Emulated at 2 Icyc
8.1.2.3
It is possible to negate one of the AGU registers (Rn) without destroying any other register, as shown in the
following code:
; NEG Operation
; Emulated at 3 Icyc
8.1.2.4
It is possible to negate a memory location, as shown in the following code:
; NEG Operation
; Emulated at 5 Icyc
When an accumulator is available, it may be faster to do this operation simply by moving the value to an
accumulator, performing the operation there, and moving the result back to memory.
Freescale Semiconductor
MOVE
NEG
MOVE
NEG
NOT
INCW
NOT
INCW
NOTC
LEA
NOTC
INCW
Negating the X0, Y0, or Y1 Data ALU registers
Negating an AGU register
Negating a Memory Location
X:(R0),A
A
A1,A
A
A
A
Y0
Y0
R0
(R0)+
X:$19
X:$19
; Move a 16-bit value to an accumulator,
; clearing A0 register
; Now negates upper 20 bits of accumulator
; since A0 = 0
; Force A2 to sign extension,
; force A0 cleared
; Now negates upper 20 bits of accumulator
; since A0 = 0
; One’s-complement of A1, A2 unchanged
; Increment to get two’s-complement,
; A2 may be incorrect
Software Techniques
Useful Instruction Operations
8-5

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