dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 217

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

8.10.1.1
During ISRs that are short, it is recommended that level 0 interrupts remain disabled. Since the routines are
short, it is not nearly so important to interrupt them, because they are guaranteed to complete execution
quickly. This is also recommended for ISRs with a very high priority, which should not be interrupted by
some other source.
; DSP56800 core (Interrupts Remain Masked, 9 Overhead Cycles)
; Interrupt Service Routine for Short ISR
;
ISR1:
;
8.10.1.2
For ISRs that require a significant number of instruction cycles to complete, it is possible to reduce the
interrupt servicing overhead if all interrupts can be considered to have the same priority. This is shown in
the following generic ISR.
; DSP56800 core (Interrupts Remain Masked, 11 Overhead Cycles)
; Interrupt Service Routine for Long ISR
;
ISR2:
;
Freescale Semiconductor
JSR
(interrupt code)
RTI
JSR
BFCLR #$0200,SR
(interrupt code)
RTI
High Priority or a Small Number of Instructions
Many Instructions of Equal Priority
ISR1
ISR2
; located in interrupt vector table
; located in interrupt vector table
; re-enable interrupts with new mask
Software Techniques
Interrupts
8-31