dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 297

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

DEC(W)
Operation:
D – 1 → D
D – 1 → D (single parallel move)
Description: Decrement a 16-bit destination by one. If the destination is an accumulator, only the EXT and MSP
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Freescale Semiconductor
Operation
DECW
DEC
or
A Before Execution
A2
0
portions of the accumulator are used and the LSP remains unchanged. The condition codes are calcu-
lated based on the 16-bit result. Duplicate destination is not allowed when this instruction is used in
conjunction with a parallel read.
This instruction is typically used when processing integer data.
DECW
Prior to execution, the 36-bit A accumulator contains the value $0:0001:0033. Execution of the
DECW A instruction decrements by one the upper 20 bits of the A accumulator.
See Section 3.6.5, “16-Bit Destinations,” on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, “36-Bit Destinations — CC Bit Set,” on page 3-34 and Section 3.6.4, “20-Bit Des-
tinations — CC Bit Set,” on page 3-34 for the case when the CC bit is set.
LF
15
0001
14
A1
*
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
C
13
*
Operands
X:(SP-xx)
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the signed integer portion of the result is in use
— Set if result is not normalized
— Set if bit 35 of the result is set
— Set if the 20 MSBs of the result are all zeros
— Set if overflow has occurred in result
— Set if a carry (or borrow) occurs from bit 35 of the result
X:xxxx
FDD
X:aa
A
12
*
MR
11
*
0033
A0
10
Decrement Word
X:(R2)+,X0
*
Instruction Set Details
I1
9
C
2
8
6
8
Assembler Syntax:
DECW
DECW
I0
8
W
1
1
1
2
SZ
7
; Decrement the 20 MSBs of A and then
;
A After Execution
Decrement word
Decrement word in memory using appropriate addressing
mode.
X:aa represents a 6-bit absolute address. Refer to Abso-
lute Short Address (Direct Addressing): <aa> on page
4-22.
L
6
A2
0
E
5
update R2,X0
D
D
U
4
CCR
0000
A1
N
3
(single parallel move)
Z
Comments
2
V
1
0033
C
DEC(W)
0
A0
A-67