dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 88

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Address Generation Unit
modes specify that the operand is (or operands are) in memory and provide the specific address(es) of the
operand(s). A portion of the data bus movement field in the instruction specifies the memory reference to
be performed. The type of address arithmetic used is specified by the address modifier register.
Address-register-indirect modes may require an offset and a modifier register for use in address
calculations. The address register (Rj or SP) is used as the address register, the shared offset register is used
to specify an optional offset from this pointer, and the modifier register is used to specify the type of
arithmetic performed.
Some addressing modes are only available with certain address registers (Rn). For example, although all
address registers support the “indexed by long displacement” addressing mode, only the R2 address
register supports the “indexed by short displacement” addressing mode. For instructions where two reads
are performed from the X data memory, the second read using the R3 pointer must always be from on-chip
memory. The addressed register sets are summarized in Table 4-5.
4-8
Post-increment
Post-update by offset N
Instructions that access P memory are not allowed when the XP bit in the OMR is set (that is, when the
instructions are executing from data memory).
No update
Post-increment
Post-decrement
Post-update by offset N
available for word accesses only
Indexed by offset N
Indexed by 6-bit displacement
R2 and SP registers only
Indexed by 16-bit displacement
1.
R0-R3 or SP.
Address Register Indirect
Rj represents one of the four pointer registers R0-R3; Rn is any of the AGU address registers
Addressing Mode:
Table 4-4. Addressing Mode — Address Register Indirect
Accessing Program (P) Memory
DSP56800 Family Manual
Accessing Data (X) Memory
Notation in the Instruction Set
X:(Rn+xxxx)
Summary
X:(R2+xx)
X:(Rn)+N
X:(Rn+N)
X:(SP-xx)
P:(Rj)+N
X:(Rn)+
X:(Rn)-
P:(Rj)+
X:(Rn)
1
X:(SP+$03F7)
X:(SP-$1E)
X:(R2+15)
Examples
X:(R1)+N
X:(R2+N)
X:(R0-97)
X:(SP+N)
P:(R3)+N
X:(R1)+
X:(SP)+
Freescale Semiconductor
P:(R0)+
X:(R3)-
X:(SP)-
X:(R3)
X:(SP)

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